/******************************************************************************
*
* MODULE:    SumadorBit.v
* DEVICE:     
* PROJECT:   Tarea 1 Diseño Electronico Digital
* AUTHOR:    Ricardo Dávila Castro   
* DATE:      2010 10:36:48
*
* ABSTRACT:  Teste Bench del Sumador un Bit Ejercicio Cuatro
*            
*******************************************************************************/
`ifndef 	SUMADORBIT_TB
`define    SUMADORBIT_TB

`timescale 1ns / 100ps
module SumadorBit_TB();

reg [2:0] a ;


initial
  begin
     a[2] <= 1'b 0;
    forever #40 a[2] <= ~a[2];
  end 
  
initial
  begin
     a[1] <= 1'b 0;
    forever #20 a[1] <= ~a[1];
  end 
  
initial
  begin
     a[0] <= 1'b 0;
    forever #10 a[0] <= ~a[0];
  end
  

 
  SumadorBit sumador(.Op(a));
endmodule
`endif